The invention relates to the field of integrated circuits and, in particular, to reference circuits for integrated circuits.
The invention allows the circuit designer to compensate for variations in the behavior of circuits due to the effect of temperature variations and variations in the electrical properties in integrated circuit components caused by manufacturing tolerances (e.g. the difficulty in manufacturing several transistors with precisely the same channel length). MOS integrated circuits, in general, show large variations in speed of operation due to the fact that the transconductance of an MOS transistor is proportional to its channel length. This dimension is made as small as possible to maximize the speed of operation and to maximize the number of transistors which may be included on a semiconductor substrate. Significant variations in the channel length and the speed of operation are the consequence of a desire to make the channel as short as possible. Other manufacturing tolerances also speed or slow the operation of circuits, usually to a lesser degree than the channel length.
Temperature variations cause large variations in the speed of MOS circuit operation because it affects the transconductance of MOS transistors. Typically, transconductance of MOS transistors is inversely proportional to temperature, such that an increase in temperature will result in a decrease in transconductance. The effect of these variations, including the variations in temperature and manufacturing tolerances, can be minimized by the use of the invention in conjunction with other circuit elements that are normally used in the construction of functional circuits. The invention permits the circuit operation to be stabilized, without significant change in the circuit implementation.
The present invention allows the fabrication of MOS integrated circuits which have a smaller variation in their speed of operation, over temperature and manufacturing process variation than previous methods.